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  SSM3J35CT 2008-03-14 1 toshiba field-effect transisto r silicon p-chan nel mos type SSM3J35CT high-speed switching applications analog switch applications ? 1.2-v drive ? low on-resistance : r on = 44 ? (max) (@v gs = -1.2 v) : r on = 22 ? (max) (@v gs = -1.5 v) : r on = 11 ? (max) (@v gs = -2.5 v) : r on = 8 ? (max) (@v gs = -4.0 v) absolute maximum ratings (ta = 25 ? c) characteristic symbol rating unit drain?source voltage v dss -20 v gate?source voltage v gss 10 v dc i d -100 drain current pulse i dp -200 ma drain power dissipation p d (note 1) 100 mw channel temperature t ch 150 c storage temperature t stg ?55 to 150 c note: using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i .e. operating temperature/curre nt/voltage, etc.) are within the absolute maximum ratings. please design the appropriate reliability upon reviewing the toshiba semiconductor reliability handbook (?handling precautions?/?derating concept and methods?) and individual reliability data (i.e. reliability test report and estimated failure rate, etc). note 1: mounted on an fr4 board (10 mm 10 mm 1.0 mm, cu pad: 100 mm 2 ) marking (top view) pin assignment (top view) equivalent circuit (top view) unit: mm jedec - jeita - toshiba 2-1j1b weight: 0.75 mg (typ.) 1. gate 2. source 3. drain * electrodes: on the bottom polarity mark polarity mark (on the top) 1 2 3 s3 1 2 3 0.250.03 1.00.05 0.650.02 0.350.02 0.150.03 0.250.03 0.50.03 0.60.05 0.38 +0.02 -0.03 0.050.03 0.050.03 cst3
SSM3J35CT 2008-03-14 2 electrical characteristics (ta = 25c) characteristic symbol test condition min typ. max unit gate leakage current i gss v gs = 10 v, v ds = 0 v ? ? 10 a drain?source breakdown voltage v (br) dss i d = -0.1 ma, v gs = 0 v -20 ? ? v drain cutoff current i dss v ds = -20 v, v gs = 0 v ? ? -1 a gate threshold voltage v th v ds = -3 v, i d = -1 ma -0.4 ? -1.0 v forward transfer admittance ? y fs ? v ds = -3 v, i d = -50 ma (note 2) 77 ? ? ms i d = -50 ma, v gs = -4 v (note 2) ? 4.3 8 i d = -50 ma, v gs = -2.5 v (note 2) ? 5.6 11 i d = -5 ma, v gs = -1.5 v (note 2) ? 8.2 22 drain?source on-resistance r ds (on) i d = -2 ma, v gs = -1.2 v (note 2) ? 11 44 input capacitance c iss ? 12.2 ? reverse transfer capacitance c rss ? 6.5 ? output capacitance c oss v ds = -3 v, v gs = 0 v, f = 1 mhz ? 10.4 ? pf turn-on time t on ? 175 ? switching time turn-off time t off v dd = -3 v, i d = -50 ma, v gs = 0 to -2.5 v ? 251 ? ns drain?source forward voltage v dsf i d = 100 ma, v gs = 0 v (note 2) ? 0.83 1.2 v note 2: pulse test switching time test circuit (a) test circuit (b) v in usage considerations let v th be the voltage applied between gate and sour ce that causes the drain current (i d ) to below ( ? 1 ma for the SSM3J35CT). then, for normal switching operation, v gs(on) must be higher than v th, and v gs(off) must be lower than v th. this relationship can be expressed as: v gs(off) < v th < v gs(on). take this into consideration when using the device. handling precaution when handling individual devices that are not yet mounted on a circuit board, make sure that the environment is protected against electrostatic discharge. operators should wear antistatic clothing, and containers and other objects that come into direct contact with devices should be made of antistatic materials. (c) v out v dd = -3 v d.u. 1% v in : t r , t f < 5 ns (z out = 50 ) common source ta = 25c in 0 ? 2.5v 10 s v dd out 50 r l t on 90% 10% ?2.5 v 0 v 90% 10% t off t r t f v ds (on) v dd
SSM3J35CT 2008-03-14 3 i d ? v gs gate?source voltage v gs (v) drain current i d (ma) -0.01 0 -1 -1000 -2 -1 -0.1 -10 -100 i d ? v ds drain?source voltage v ds (v) drain current i d (ma) r ds (on) ? v gs gate?source voltage v gs (v) -10 -8 -6 -4 -2 0 0 drain current i d (ma) drain?source on-resistance r ds (on) ( ? ) 0 -1 10 -1000 -10 5 15 20 -100 r ds (on) ? i d 0 ? 50 10 50 150 0 5 20 15 100 r ds (on) ? ta ambient temperature ta (c) drain?source on-resistance r ds (on) ( ? ) 0 -0.5 -1 -1.5 -2 common source ta = 25c 0 -50 -100 -150 -200 -250 -10v -2.5v -1.8v -1.5v v gs =-1.2v ? 25c ta = 100c 25c common source v ds = -3v r ds (on) ? v gs gate?source voltage v gs (v) drain?source on-resistance r ds (on) ( ? ) -10 -8 -6 -4 -2 0 0 20 10 5 15 -3 common source i d = -5 ma ta=100 25 -25 25 ta=100 -25 5 10 15 v gs = -1.2 v -4 v -2.5 v -1.5 v common source ta = 25c -2.5 v, -50ma v gs =? 1.2 v, id=-2ma -4v, -50ma -1.5 v, -5ma common source -4v common source i d = -50 ma drain?source on-resistance r ds (on) ( ? )
SSM3J35CT 2008-03-14 4 ? y fs ? ? i d i dr ? v ds drain current i d (ma) drain?source voltage v ds (v) drain?source voltage v ds (v) drain current i d (ma) drain reverse current i dr (ma) switching time t (ns) 10 -0.1 100 10000 1000 -100 -1 -10 -0.1 10 100 -100 -1 -10 0.01 0 1 1000 1.4 0.4 0.1 10 100 0.2 0.6 0.8 1 1.2 c ? v ds t ? i d 1 forward transfer admittance ? y fs ? (ms) capacitance c (pf) 0 0 250 160 40 50 200 20 60 80 100 140 120 p d ? ta ambient temperature ta (c) drain power dissipation p d (mw) v th ? ta ambient temperature ta (c) gate threshold voltage v th (v) 0 -0.4 -0.2 -1 -0.8 -0.6 common source i d = -1 ma v ds = -3 v ? 50 50 150 0 100 common source v gs = 0 v g d s i dr c iss c rss c oss -1000 common source v gs = 0 v f = 1 mhz ta = 25c ta=100 25c -25c 100 150 t r t on t f t off common source v dd = -3 v v gs = 0 to -2.5 v ta = 25c 1 -1 10 1000 100 -1000 -10 -100 common source v ds = -3 v ta = 25c mounted on fr4 board (10 mm 10 mm 1.0 mm, cu pad: 100 mm 2 )
SSM3J35CT 2008-03-14 5 restrictions on product use 20070701-en general ? the information contained herein is subject to change without notice. ? toshiba is continually working to improve the quality and reliability of its products. nevertheless, semiconductor devices in general can malfunction or fail due to their inherent electrical sensitivity an d vulnerability to physical stress. it is the responsibility of the buyer, when utilizing toshiba produc ts, to comply with the standards of safety in making a safe design for the entire system, and to avoid situations in which a malfunction or failure of such toshiba products could cause loss of human life, bodily injury or damage to property. in developing your designs, please ensure that toshiba products are used within specified operating ranges as set forth in the most recent toshib a products specifications. also, please keep in mind the precautions and conditions set forth in the ?handling guide for semiconduct or devices,? or ?toshiba semiconductor reliability handbook? etc. ? the toshiba products listed in this document are in tended for usage in general electronics applications (computer, personal equipment, office equipment, measuri ng equipment, industrial robotics, domestic appliances, etc.).these toshiba products are neither intended nor warranted for usage in equipment that requires extraordinarily high quality and/or reliability or a malfuncti on or failure of which may cause loss of human life or bodily injury (?unintended usage?). unintended usage incl ude atomic energy control instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments, medical instruments, all types of safety devices, et c.. unintended usage of toshiba products listed in his document shall be made at the customer?s own risk. ? the products described in this document shall not be used or embedded to any downstream products of which manufacture, use and/or sale are prohibited under any applicable laws and regulations. ? please contact your sales representative for product- by-product details in this document regarding rohs compatibility. please use these products in this document in compliance with all applicable laws and regulations that regulate the inclusion or use of controlled substances. toshiba assumes no liability for damage or losses occurring as a result of noncompliance with applicable laws and regulations.


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